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Archive for the ‘IO’ Category

Learn about I/O

January 19, 2015 Leave a comment

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Categories: 1.ANALOG, IO

IO Issues

January 19, 2015 Leave a comment
Categories: 1.ANALOG, IO

Peripheral IO

January 19, 2015 Leave a comment
Categories: 1.ANALOG, IO

A Staggered CUP IO

January 19, 2015 Leave a comment
Categories: 1.ANALOG, IO

Input Output Issues ESD, Inductance, and Synchronization

July 5, 2013 Leave a comment

Introduction

So far we have been talking about how to build logic on a chip. But no matter how complex the chip, there will always be a need to get information onto and off of the chip. In many high performance chips, you need to stream large amounts of data onto and off the chip, requiring high-bandwidth I/O. There are many special issues that you need to think about when designing / using I/O drivers, that arise from their ‘unique’ mechanical and electrical constraints. I/O circuitry has to physically connect to some wire on the board, and that means there has to been a geometric scaling of the wire size to make this connection. In addition the I/O needs to protect the internal circuitry from the ‘harsh’ electrical environment on the board. Finally while it might be possible to maintain a good clock environment on the chip, you will need to eventually talk with some systems that run off a different clock. In this situation you will need to synchronize the external signal to your clock.

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Categories: 1.ANALOG, IO