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Archive for the ‘ADC’ Category

Sensor to ADC Design – section 4

April 11, 2013 Leave a comment

High-speed op amps are used extensively in wireless communications. These amplifiers usually operate below 500MHz, and often they operate at 25MHz and below. Applications for high-speed op amps include filtering circuits, IF amplifiers, cable drivers, ADC drivers, and mixers.

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Categories: 1.ANALOG, ADC

Sensor to ADC—analog interface design

April 11, 2013 Leave a comment

Introduction

The sensor output voltage span seldom equals the analog- to-digital converter (ADC) input voltage span. Sensor data is lost and/or ADC dynamic range is not fully utilized because the spans are unequal, start at different DC voltages, or both. In Figure 1(a) the spans are equal but offset. This situation requires level shifting to move the sensor output voltage up by one volt so the spans match. In Figure 1(b) the spans are unequal, but no offset exists. This situation requires amplification of the sensor output to match the spans. When the spans are unequal and off- set, as is often the case, level shifting and amplification are required to match the spans.

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Categories: 1.ANALOG, ADC

A Glossary of Analog-to-Digital Specifications and Performance Characteristics

March 22, 2013 Leave a comment

ABSTRACT

This glossary is a collection of the definitions of Texas Instruments’ Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) Converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.

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Categories: 1.ANALOG, ADC

How delta-sigma ADCs work, Part 1

March 22, 2013 Leave a comment

By Bonnie Baker,Signal Integrity Engineer

Analog techniques have dominated signal processing for years, but digital techniques are slowly encroaching into this domain. The design of delta-sigma (DS) analog-to- digital converters (ADCs) is approximately three-quarters digital and one-quarter analog. DS ADCs are now ideal for converting analog signals over a wide range of frequencies, from DC to several megahertz. Basically, these converters consist of an oversampling modulator followed by a digital/ decimation filter that together produce a high-resolution data-stream output. This two-part article will look closely at the DS ADC’s core. Part 1 will explore the basic topology and function of the DS modulator, and Part 2 will explore the basic topology and function of the digital/decimation filter module.

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Categories: 1.ANALOG, ADC

How the voltage reference affects ADC performance, Part 3

March 18, 2013 Leave a comment

By Bonnie Baker, Senior Applications Engineer, and Miro Oljaca, Senior Applications Engineer  from Texas Instruments

This article is Part 3 of a three-part series that investigates the design and performance of a voltage-reference system for a successive-approximation-register (SAR) analog-to- digital converter (ADC). Part 1 (see Reference 1) exam- ined the ADC characteristics and specifications, with a particular interest in the gain error and signal-to-noise ratio, while assessing how the voltage reference impacts the ADC transfer function and DC accuracy. Part 2 (see Reference 2) examined the voltage-reference characteris- tics, focusing on how the voltage-reference noise produces the most error at the converter’s full-scale range. Part 2 concluded by presenting a design for a voltage-reference circuit that is appropriate for 8- to 14-bit converters. This article, Part 3, tackles the challenge of designing a voltage- reference circuit that is appropriate for converters with 16+ bits. Part 3 examines methods of improving noise filtering and of compensating for losses caused by the improved filters.

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Categories: 1.ANALOG, ADC

How the voltage reference affects ADC performance, Part 2

March 18, 2013 Leave a comment

By Miro Oljaca, Senior Applications Engineer, and Bonnie Baker, Senior Applications Engineer  from Texas Instruments

Introduction

This article is Part 2 of a three-part series that investigates the design and performance of a voltage-reference system for a successive-approximation register (SAR) analog-to- digital converter (ADC). A simplified version of this system is shown in Figure 1. When a design uses an ADC in this system, it is critical to understand the voltage-reference path to the converter. Part 1 (see Reference 1) examined the fundamental operation of an ADC independent of the voltage reference, and then analyzed the performance characteristics that have an impact on the accuracy and repeatability of the system. Part 2 looks at the key charac- teristics of the voltage-reference block in Figure 1 and the reference’s possible impact on the ADC’s performance. Part 2 also shows how to design an appropriate external reference for 8- to 14-bit ADCs. Part 3, which will appear in a future issue of the Analog Applications Journal, will investigate the impact of the voltage-reference buffer and the capacitors that follow it, discuss how to ensure that the amplifier is stable, and provide a reference design that is appropriate for ADCs with 16+ bits.

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Categories: 1.ANALOG, ADC

How the voltage reference affects ADC performance, Part 1

March 18, 2013 Leave a comment

By Bonnie Baker, Senior Applications Engineer, and Miro Oljaca, Senior Applications Engineer  from Texas Instrument.

Introduction

When designing a mixed-signal system, many designers have a tendency to examine and optimize each component separately. This myopic approach can go only so far if the goal is to have a working design at the end of the day. Given the array of different components in a system, designers must have a complete understanding of not only the individual components but also their impact on the overall system performance. When a design has an analog- to-digital converter (ADC), it is critical to understand how this device interacts with the voltage reference and voltage- reference buffer.

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Categories: 1.ANALOG, ADC